Low-power high-performance clock path architecture
US-2024393824-A1 · Nov 28, 2024 · US
US9035705B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9035705-B2 |
| Application number | US-201213980122-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 19, 2012 |
| Priority date | Jan 20, 2011 |
| Publication date | May 19, 2015 |
| Grant date | May 19, 2015 |
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An integrated oscillator circuit comprises an oscillator configured to be switched between a first frequency and a second frequency. A switching circuit receives an input representing a target frequency and switches the oscillator between the first and second frequencies at intervals determined by the input, so as to cause the average output frequency of the oscillator to approximate the target frequency.
Opening claim text (preview).
The invention claimed is: 1. An integrated oscillator circuit comprising: an oscillator configured to be switched between a first frequency and a second frequency; switching circuitry configured to receive an input representative of a target frequency and to switch the oscillator between the first and second frequencies at intervals determined by the input so as to cause the average output frequency of the oscillator to approximate the target frequency; and circuitry for calib…
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