Wafer level sealing methods with different vacuum levels for MEMS sensors

US9035451B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9035451-B2
Application numberUS-201314041298-A
CountryUS
Kind codeB2
Filing dateSep 30, 2013
Priority dateSep 30, 2013
Publication dateMay 19, 2015
Grant dateMay 19, 2015

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Abstract

Official abstract text for this publication.

The present disclosure relates to a method of forming a plurality of MEMs device having a plurality of cavities with different pressures on a wafer package system, and an associated apparatus. In some embodiments, the method is performed by providing a work-piece having a plurality of microelectromechanical system (MEMs) devices. A cap wafer is bonded onto the work-piece in a first ambient environment having a first pressure. The bonding forms a plurality of cavities abutting the plurality of MEMs devices, which are held at the first pressure. One or more openings are formed in one or more of the plurality of cavities leading to a gas flow path that could be held at a pressure level different from the first pressure. The one or more openings in the one or more of the plurality of cavities are then sealed in a different ambient environment having a different pressure, thereby causing the one or more of the plurality of cavities to be held at the different pressure.

First claim

Opening claim text (preview).

What is claimed is: 1. A wafer level packaging (WLP) structure comprising: a work-piece including a silicon region and including first and second micro-electromechanical system (MEMs) devices thereon; first and second cavities-disposed at least partially in the silicon region of the work-piece, and fluidly coupled to the first and second MEMs devices, respectively, wherein the first cavity retains a first pressure level and the second cavity retains a different second pressure l…

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What does patent US9035451B2 cover?
The present disclosure relates to a method of forming a plurality of MEMs device having a plurality of cavities with different pressures on a wafer package system, and an associated apparatus. In some embodiments, the method is performed by providing a work-piece having a plurality of microelectromechanical system (MEMs) devices. A cap wafer is bonded onto the work-piece in a first ambient envi…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification B81C1/00293. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue May 19 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).