Semiconductor device
US-2024421048-A1 · Dec 19, 2024 · US
Method for mounting a semiconductor chip on a carrier
US9034751B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9034751-B2 |
| Application number | US-201414335660-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 18, 2014 |
| Priority date | Feb 10, 2011 |
| Publication date | May 19, 2015 |
| Grant date | May 19, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A method includes providing a semiconductor chip having a first main surface and a layer of solder material deposited on the first main surface, wherein the layer of solder material has a roughness of at least 1 μm. The semiconductor chip is placed on a carrier with the first main surface of the semiconductor chip facing the carrier. The semiconductor chip is pressed on the carrier with a pressure of at least 1 Newton per mm 2 of surface area of the first main surface and heat is applied to the solder material.
First claim
Opening claim text (preview).
What is claimed is: 1. A method comprising: placing a semiconductor chip with a solder layer on a carrier, wherein the solder layer has a first main surface and a second main surface, wherein the first main surface is adjacent to the semiconductor chip and the second main surface comprising a rough surface is adjacent to the carrier, and wherein the solder layer comprises solder materials; applying a first temperature below a melting temperature of one of the solder materials th…
Assignees
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9034751B2 cover?
- A method includes providing a semiconductor chip having a first main surface and a layer of solder material deposited on the first main surface, wherein the layer of solder material has a roughness of at least 1 μm. The semiconductor chip is placed on a carrier with the first main surface of the semiconductor chip facing the carrier. The semiconductor chip is pressed on the carrier with a press…
- Who is the assignee on this patent?
- Infineon Technologies Ag
- What technology area does this patent fall under?
- Primary CPC classification H10W70/417. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue May 19 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).