Semiconductor structure with reduced leakage current and method for manufacturing the same
US-2024413223-A1 · Dec 12, 2024 · US
Method of forming semiconductor device
US9034705B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9034705-B2 |
| Application number | US-201313850887-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 26, 2013 |
| Priority date | Mar 26, 2013 |
| Publication date | May 19, 2015 |
| Grant date | May 19, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A method of forming a semiconductor device is disclosed. At least one gate structure is provided on a substrate, wherein the gate structure includes a first spacer formed on a sidewall of a gate. A first disposable spacer material layer is deposited on the substrate covering the gate structure. The first disposable spacer material layer is etched to form a first disposable spacer on the first spacer. A second disposable spacer material layer is deposited on the substrate covering the gate structure. The second disposable spacer material layer is etched to form a second disposable spacer on the first disposable spacer. A portion of the substrate is removed, by using the first and second disposable spacers as a mask, so as to form two recesses in the substrate beside the gate structure. A stress-inducing layer is formed in the recesses.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of forming a semiconductor device, comprising: providing at least one gate structure on a substrate, wherein the gate structure comprises a first spacer formed on a sidewall of a gate; depositing a first disposable spacer material layer on the substrate covering the gate structure; etching the first disposable spacer material layer to form a first disposable spacer on the first spacer; depositing a second disposable spacer material layer on th…
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Cross-Sectional Technologies · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9034705B2 cover?
- A method of forming a semiconductor device is disclosed. At least one gate structure is provided on a substrate, wherein the gate structure includes a first spacer formed on a sidewall of a gate. A first disposable spacer material layer is deposited on the substrate covering the gate structure. The first disposable spacer material layer is etched to form a first disposable spacer on the first s…
- Who is the assignee on this patent?
- United Microelectronics Corp
- What technology area does this patent fall under?
- Primary CPC classification H10D84/017. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue May 19 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).