Data protecting method, memory controller and memory storage device using the same

Patent metadata

Field	Value
Publication number	US-9032135-B2
Application number	US-201213491607-A
Country	US
Kind code	B2
Filing date	Jun 8, 2012
Priority date	Apr 3, 2012
Publication date	May 12, 2015
Grant date	May 12, 2015

Abstract

A data protecting method for a rewritable non-volatile memory module having physical blocks is provided, a plurality of logical block addresses is mapped to a part of the physical blocks. The method includes, configuring a plurality of virtual block addresses to map to the logical block addresses, grouping at least one virtual block address into a virtual block address area, and allocating the virtual block address area to an application. The method also includes, receiving an access command which is configured to instruct accessing a first virtual block address from the application. The method also includes: determining whether the first virtual block address belongs to the virtual block address area, if not, sending an error message to the application. Accordingly, the method can effectively prevent an application from accessing the data which can not be accessed by the application program.

First claim

What is claimed is:

1. A data protecting method, for a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical blocks, a plurality of logical block addresses are configured to map to a part of the physical blocks, the data protecting method comprising:
configuring a plurality of virtual block addresses to map to the logical block addresses;
grouping at least one virtual block address of the virtual block addresses into a first virtual block address area and allocating the first virtual block address area to a first application, wherein the at least one virtual block address is mapped to at least one logical block address, and the first virtual block address area is mapped to a first logical block address area;
receiving a first access command from the first application, wherein the first access command instructs accessing a first virtual block address of the virtual block addresses;
determining whether the first virtual block address belongs to the first virtual block address area; and
if the first virtual block address does not belong to the first virtual block address area, sending an access error message to the first application.

2. The data protecting method according to claim 1 further comprising:
if the first virtual block address belongs to the first virtual block address area, obtaining a first logical block address of the logical block addresses which the first virtual block address is mapped to; and
accessing the physical block which the first logical block address is mapped to according to the first access command.

3. The data protecting method according to claim 1 further comprising:
grouping at least another one virtual block address of the virtual block addresses into a second virtual block address area and allocating the second virtual block address area to a second application;
receiving a second access command from the second application, wherein the second access command instructs accessing a second virtual block address of the virtual block addresses;
determining whether the second virtual block address belongs to the second virtual block address area; and
if the second virtual block address does not belong to the second virtual block address area, sending an access error message to the second application.

4. The data protecting method according to claim 1 further comprising:
creating an accessing block table, wherein the accessing block table records a mapping relationship between the virtual block addresses of the first virtual block address area and the logical block addresses of the first logical block address area,
wherein the step of determining whether the first virtual block address belongs to the first virtual block address area comprises:
determining whether the first virtual block address belongs to the first virtual block address area according to the accessing block table.

5. The data protecting method according to claim 1 , wherein the number of the at least one virtual block address equals to the number of the at least one logical block address, and the at least one logical block address is non-sequential.

6. A memory storage device, comprising:
a connector, configured to be coupled to a host system;
a rewritable non-volatile memory module, comprising a plurality of physical blocks, wherein a plurality of logical block addresses are configured to map to a part of the physical blocks; and
a memory controller, coupled to the connector and rewritable non-volatile memory module, configured to group at least one logical block address of the logical block addresses into a first logical block address area and allocating the first logical block address area to a first application,
wherein the memory controller is configured to receive a first access command from the first application, wherein the first access command instructs accessing at least one first logical block address,
wherein the memory controller is further configured to determine whether the at least one first logical block address belongs to the first logical block address area, if the at least one first logical block address does not belong to the first logical block address area, the memory controller is configured to send an access error message to the first application.

7. The memory storage device according to claim 6 , wherein if the at least one first logical block address belongs to the first logical block address area, the memory controller is configured to access a physical block which the at least one first logical block address is mapped to according to the first access command.

8. The memory storage device according to claim 7 , wherein the memory controller is further configured to group at least another one logical block address of the logical block addresses into a second logical block address area, allocate the second logical block address area to a second application, and receive a second access command from the second application, wherein the second access command instructs accessing at least one second logical block address of the logical block addresses,
wherein the memory controller is further configured to determine whether the at least one second logical block address belongs to the second logical block address area, if the at least one second logical block address does not belong to the second logical block address area, the memory controller is configured to send the access error message to the second application.

9. The memory storage device according to claim 7 , wherein the memory controller is further configured to respectively record a plurality of permission information corresponding to the logical block addresses belonging to the first application, wherein each of the permission information indicates whether the first application has permission to access the corresponding logical block addresses, and the logical block addresses which are able to be accessed by the first application belong to the first logical block address area,
wherein the memory controller is further configured to determine whether the at least one first logical block address belongs to the first logical block address area according to the permission information.

10. A memory controller, for controlling a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical blocks, a plurality of logical block addresses is configured to map to a part of the physical blocks, the memory controller comprising:
a host interface, configured to couple to a host system;
a memory interface, coupled to the rewritable non-volatile memory module; and
a memory management circuit, coupled to the host interface and memory interface, configured to configure a plurality of virtual block addresses to map to the logical block addresses,
wherein the memory management circuit is further configured to group at least one virtual block address of the virtual block addresses into a first virtual block address area and allocates the first virtual block address area to a first application, wherein the at least one virtual block address is mapped to at least one logical block address, and the first virtual block address area is mapped to a first logical block address area,
wherein the memory management circuit is further configured to receive a first access command from the first application, wherein the first access command instructs accessing a first virtual block address of the virtual block addresses,
wherein the memory management circuit is further configured to determine whether the first virtual block address belongs to the first virtual block address area, if the first virtual block address does not b

Assignees

• Chang Ching-Wen
• Phison Electronics Corp

Inventors

• Chang Ching-Wen

Classifications

• G06F12/0246

  in block erasable memory, e.g. flash memory · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title

• G06F12/145 Primary

  the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism · CPC title