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Method of manufacturing a vertical-type semiconductor device and method of operating a vertical-type semiconductor device
US9029939B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9029939-B2 |
| Application number | US-201313750066-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 25, 2013 |
| Priority date | Jun 4, 2008 |
| Publication date | May 12, 2015 |
| Grant date | May 12, 2015 |
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Abstract
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In a vertical-type semiconductor device, a method of manufacturing the same and a method of operating the same, the vertical-type semiconductor device includes a single-crystalline semiconductor pattern having a pillar shape provided on a substrate, a gate surrounding sidewalls of the single-crystalline semiconductor pattern and having an upper surface lower than an upper surface of the single-crystalline semiconductor pattern, a mask pattern formed on the upper surface of the gate, the mask pattern having an upper surface coplanar with the upper surface of the single-crystalline semiconductor pattern, a first impurity region in the substrate under the single-crystalline semiconductor pattern, and a second impurity region under the upper surface of the single-crystalline semiconductor pattern. The vertical-type pillar transistor formed in the single-crystalline semiconductor pattern may provide excellent electrical properties. The mask pattern is not provided on the upper surface of the single-crystalline semiconductor pattern in the second impurity region, to thereby reduce failures of processes.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device, comprising: a semiconductor pattern provided on a substrate; a gate adjacent to a sidewall of the semiconductor pattern, the gate having an upper surface lower than an upper surface of the semiconductor pattern; a mask pattern formed on the upper surface of the gate, the mask pattern having an upper surface coplanar with the upper surface of the semiconductor pattern; a first impurity region in the substrate under the semiconduc…
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Classifications
Electricity · mapped topic
- H10D30/63Primary
Electricity · mapped topic
- H10D30/025Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9029939B2 cover?
- In a vertical-type semiconductor device, a method of manufacturing the same and a method of operating the same, the vertical-type semiconductor device includes a single-crystalline semiconductor pattern having a pillar shape provided on a substrate, a gate surrounding sidewalls of the single-crystalline semiconductor pattern and having an upper surface lower than an upper surface of the single-…
- Who is the assignee on this patent?
- Samsung Electronics Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10D30/63. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue May 12 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).