Solid state imaging apparatus including reference signal generator with a slope converting circuit

US9029752B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9029752-B2
Application numberUS-201213540285-A
CountryUS
Kind codeB2
Filing dateJul 2, 2012
Priority dateJul 28, 2011
Publication dateMay 12, 2015
Grant dateMay 12, 2015

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Abstract

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A solid-state imaging apparatus comprises a plurality of matrix pixels, a reference signal generator for generating a ramp signal, a counter for performing counting according to the ramp signal output, and an AD converter, arranged for each pixel column, for performing AD conversion by comparing a pixel signal from the pixel with the ramp signal. Further, the AD converter includes a comparator to which the pixel signal and the reference signal are input, a storage for storing the AD conversion result, and an slope converter, between the output terminal of the reference signal generator and the input terminal of the comparator, for changing a gradient of the ramp signal, so that the noise overlaid on the ramp signal changes depending on the gradient of the ramp signal. Thus, it is possible to prevent generation of a horizontal-line noise in the ramp signal.

First claim

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What is claimed is: 1. A solid-state imaging apparatus, comprising: a plurality of pixels arranged in a matrix, each of the plurality of pixels including a photoelectric conversion element; a reference signal generating circuit configured to generate a reference signal of which a signal level changes over time with a slope; a counter circuit configured to perform a counting operation according to the change of the reference signal; and an AD converting circuit, arranged for…

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What does patent US9029752B2 cover?
A solid-state imaging apparatus comprises a plurality of matrix pixels, a reference signal generator for generating a ramp signal, a counter for performing counting according to the ramp signal output, and an AD converter, arranged for each pixel column, for performing AD conversion by comparing a pixel signal from the pixel with the ramp signal. Further, the AD converter includes a comparator …
Who is the assignee on this patent?
Saito Kazuhiro, Hiyama Hiroki, Itano Tetsuya, and 2 more
What technology area does this patent fall under?
Primary CPC classification H04N25/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 12 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).