Liquid crystal display panel, liquid crystal display device, and method of driving a liquid crystal display device

US9024979B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9024979-B2
Application numberUS-201113103348-A
CountryUS
Kind codeB2
Filing dateMay 9, 2011
Priority dateOct 28, 2010
Publication dateMay 5, 2015
Grant dateMay 5, 2015

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  1. Title

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  2. Abstract

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Abstract

Official abstract text for this publication.

A liquid crystal display (LCD) panel is disclosed. The LCD panel includes a plurality of pixels arranged in rows and columns, a first sub gate-line coupled to first row-pixels that are adjacent to a lower side of the first sub gate-line, a second sub gate-line coupled to second row-pixels that are adjacent to an upper side of the second sub gate-line, a plurality of gate-lines between the first sub gate-line and the second sub gate-line, a plurality of even data-lines coupled to first column-pixels that are adjacent to the even data-lines, and a plurality of odd data-lines coupled to second column-pixels that are adjacent to the odd data-lines. Here, each gate-line of the plurality of gate lines is coupled to first row-pixels that are adjacent to a lower side of the gate-line and second row-pixels that are adjacent to an upper side of the gate-line.

First claim

Opening claim text (preview).

What is claimed is: 1. A liquid crystal display (LCD) panel comprising: a plurality of pixels arranged in rows of row-pixels and in columns of column-pixels, each of the rows of row-pixels extending in a gate-line direction and comprising first positioned row-pixels and second positioned row-pixels, each of the columns of column-pixels extending in a data-line direction crossing the gate-line direction and comprising first positioned column-pixels and second positioned column-pixe…

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What does patent US9024979B2 cover?
A liquid crystal display (LCD) panel is disclosed. The LCD panel includes a plurality of pixels arranged in rows and columns, a first sub gate-line coupled to first row-pixels that are adjacent to a lower side of the first sub gate-line, a second sub gate-line coupled to second row-pixels that are adjacent to an upper side of the second sub gate-line, a plurality of gate-lines between the first…
Who is the assignee on this patent?
Lee Seung-Kyu, Lee Dong-Hoon, Kim Chul-Ho, and 2 more
What technology area does this patent fall under?
Primary CPC classification G09G3/3614. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 05 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).