Pilot signal generation circuit

Patent metadata

Field	Value
Publication number	US-9024685-B2
Application number	US-201314095945-A
Country	US
Kind code	B2
Filing date	Dec 3, 2013
Priority date	Apr 14, 2010
Publication date	May 5, 2015
Grant date	May 5, 2015

Abstract

In some embodiments, a pilot signal generation circuit is provided including a buffer and a differential amplifier responsive to an output of the buffer. A first transistor is connected to control a reference voltage at an input of the buffer in response to a pulse width modulated logic signal and a second transistor connected to control a reference voltage at an input of the differential amplifier based on the pulse width modulated logic signal such that the second transistor is connected so as to turn on when the first transistor is turned off and to turn off when the first transistor is turned on. The differential amplifier is configured to provide at an output a pilot signal proportional to a gain of the differential amplifier.

First claim

What is claimed is:

1. A pilot signal generation circuit comprising:
a) a buffer;
b) a differential amplifier responsive to an output of the buffer;
c) a first transistor connected to control a reference voltage at an input of the buffer in response to a pulse width modulated logic signal;
d) a second transistor connected to control a reference voltage at an input of the differential amplifier based on the pulse width modulated logic signal such that the second transistor is connected so as to turn on when the first transistor is turned off and to turn off when the first transistor is turned on; and
e) wherein the differential amplifier is configured to provide at an output a pilot signal proportional to a gain of the differential amplifier.

2. The pilot signal generation circuit of claim 1 , wherein the second transistor is connected to an output of the first transistor so as to be responsive to the output of the first transistor to control the reference voltage at the input of the differential amplifier.

3. The pilot signal generation circuit of claim 2 , wherein the first transistor and the second transistor are connected such that the reference voltage at the input of the differential amplifier is high when the reference voltage at the input of the buffer is low, and such that the reference voltage at the input of the differential amplifier is low when the reference voltage at the input of the buffer is high.

4. The pilot signal generation circuit of claim 1 , wherein the first transistor and the second transistor are connected such that the reference voltage at the input of the differential amplifier is high when the reference voltage at the input of the buffer is low, and such that the reference voltage at the input of the differential amplifier is low when the reference voltage at the input of the buffer is high.

5. The pilot signal generation circuit of claim 1 , wherein the reference voltage at the input of the buffer and the reference voltage at the input of the differential amplifier are connected via respective resistors to a common source reference voltage.

6. The pilot signal generation circuit of claim 5 , wherein the second transistor is connected so as to respond to an output of the first transistor to control the reference voltage at the input of the differential amplifier based on the pulse width modulated logic signal.

Assignees

• Aerovironment Inc

Inventors

• Flack Albert

Classifications

• B60L3/00 Primary

  Electric devices on electrically-propelled vehicles for safety purposes; Monitoring operating variables, e.g. speed, deceleration or energy consumption (methods or circuit arrangements for monitoring or controlling batteries or fuel cells B60L58/00) · CPC title

• H03F1/3235

  using a pilot signal · CPC title

• H03F3/45 Primary

  Differential amplifiers (differential sense amplifiers G11C7/062) · CPC title

• B60L3/0069

  relating to the isolation, e.g. ground fault or leak current · CPC title

• H02J7/0029

  Electricity · mapped topic