Method and apparatus for timing closure
US-9223920-B2 · Dec 29, 2015 · US
US9024670B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9024670-B2 |
| Application number | US-201314048238-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 8, 2013 |
| Priority date | Oct 8, 2013 |
| Publication date | May 5, 2015 |
| Grant date | May 5, 2015 |
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An integrated circuit (IC) includes a plurality of input/output (I/O) terminals through which signals pass into or out of the IC and an I/O timing module. The I/O timing module is configured to add propagation delay to signals passing between the I/O terminals and I/O subsystems of the IC. The I/O timing module includes a plurality of delay elements associated with each of the I/O terminals, a control register associated with each of the I/O terminals, a memory, and I/O delay control logic. The control register is coupled to each of the delay elements associated with the I/O terminal. The memory is encoded with delay information. The I/O delay control logic is configured to initialize the propagation delay associated with each of the I/O terminals by selecting which of the delay elements are to be applied to produce the propagation delay based on the delay information stored in the memory.
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What is claimed is: 1. An integrated circuit (IC), comprising: a plurality of input/output (I/O) terminals through which signals pass into or out of the IC; and an I/O timing module configured to add propagation delay to signals passing between the I/O terminals and I/O subsystems of the IC, the I/O timing module comprising: a plurality of delay elements associated with each of the I/O terminals; a control register associated with each of the I/O terminals and coupled to each…
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