Vertical transistor with dielectrically-isolated work-function metal electrodes surrounding the semiconductor pillar

US9024376B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9024376-B2
Application numberUS-201414160788-A
CountryUS
Kind codeB2
Filing dateJan 22, 2014
Priority dateJan 25, 2013
Publication dateMay 5, 2015
Grant dateMay 5, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A semiconductor device includes a pillar-shaped semiconductor having an impurity concentration of 10 17 cm −3 or less, a first insulator that surrounds the pillar-shaped semiconductor, a first metal that surrounds a portion of the first insulator at a first end of the pillar-shaped semiconductor, a second metal that surrounds a portion of the first insulator at the second end of the pillar-shaped semiconductor, a third metal that surrounds a portion of the first insulator in a region sandwiched between the first metal and the second metal, a second insulator formed between the first and third metals, a third insulator formed between the second and third metals, a fourth metal that connects the first metal and the one end, and a fifth metal that connects the second metal and the other end. The third metal has a work function of about 4.2 eV to about 5.0 eV.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a pillar-shaped semiconductor having an impurity concentration of 10 17 cm −3 or less; a first insulator surrounding the pillar-shaped semiconductor; a first metal surrounding a portion of the first insulator at a first end of the pillar-shaped semiconductor; a second metal surrounding a portion of the first insulator at a second end of the pillar-shaped semiconductor; a third metal surrounding a portion of the first insulator in a region sandwiched between the first metal and the second metal; a second insulator between the first metal and the third metal; a third insulator between the second metal and the third metal; a fourth metal connecting the first metal and the first end of the pillar-shaped semiconductor; and a fifth metal connecting the second metal and the second end of the pillar-shaped semiconductor, wherein the third metal has a work function of about 4.2 eV to about 5.0 eV. 2. The semiconductor device according to claim 1 , wherein the semiconductor comprises silicon. 3. The semiconductor device according to claim 2 , wherein the first metal and the second metal have a work function of about 4.0 eV to about 4.2 eV. 4. The semiconductor device according to claim 2 , wherein the first metal and the second metal have a work function of about 5.0 eV to about 5.2 eV. 5. A semiconductor device comprising: a pillar-shaped semiconductor; a first insulator surrounding the pillar-shaped semiconductor; a first metal surrounding a portion of the first insulator at a first end of the pillar-shaped semiconductor; a second metal surrounding a portion of the first insulator at a second end of the pillar-shaped semiconductor; a third metal surrounding a portion of the first insulator in a region sandwiched between the first metal and the second metal; a second insulator between the first metal and the third metal; a third insulator between the second metal and the third metal; a fourth metal connecting the first metal and the first end of the pillar-shaped semiconductor; and a fifth metal connecting the second metal and a second end of the pillar-shaped semiconductor. 6. The semiconductor device according to claim 5 , wherein charge carriers are induced at the first end of the pillar-shaped semiconductor by a difference in a work function between the pillar-shaped semiconductor and the first metal, and carriers are induced at the second end of the pillar-shaped semiconductor by a difference in the work function between the pillar-shaped semiconductor and the second metal. 7. A semiconductor device comprising: a pillar-shaped semiconductor; a first insulator surrounding a portion of the pillar-shaped semiconductor at end of the pillar-shaped semiconductor; a first metal surrounding the first insulator; a fourth insulator surrounding a portion of the pillar-shaped semiconductor at the end of the pillar-shaped semiconductor; a second metal surrounding the fourth insulator; a fifth insulator surrounding a portion of the pillar-shaped semiconductor in a region sandwiched between the first metal and the second metal; a third metal surrounding the fifth insulator; a second insulator between the first metal and the third metal; a third insulator between the second metal and the third metal; a fourth metal connecting the first metal and the one end of the pillar-shaped semiconductor; and a fifth metal connecting the second metal and the other end of the pillar-shaped semiconductor. 8. The semiconductor device according to claim 7 , wherein charge carriers are induced at the first end of the pillar-shaped semiconductor by a difference in a work function between the pillar-shaped semiconductor and the first metal, and charge carriers are induced at the second end of the pillar-shaped semiconductor by a difference in a work function between the pillar-shaped semiconductor and the second metal. 9. A semiconductor device comprising: a pillar-shaped semiconductor; a first insulator surrounding at least a part of a portion of the pillar-shaped semiconductor at one end of the pillar-shaped semiconductor; a first metal surrounding at least a part of the first insulator; a fourth insulator surrounding at least a part of a portion of the pillar-shaped semiconductor at the end of the pillar-shaped semiconductor; a second metal surrounding at least a part of the fourth insulator; a fifth insulator surrounding at least a part of a portion of the pillar-shaped semiconductor in a region sandwiched between the first metal and the second metal; a third metal surrounding at least a part of the fifth insulator; a second insulator between the first metal and the third metal; a third insulator between the second metal and the third metal; a fourth metal connecting the first metal and the first end of the pillar-shaped semiconductor; and a fifth metal connecting the second metal and the second end of the pillar-shaped semiconductor. 10. The semiconductor device according to claim 9 , wherein charge carriers are induced at the first end of the pillar-shaped semiconductor by a difference in a work function between the pillar-shaped semiconductor and the first metal, and charge carriers are induced at the second end of the pillar-shaped semiconductor by a difference in a work function between the pillar-shaped semiconductor and the second metal.

Assignees

Inventors

Classifications

  • characterised by the conducting layers · CPC title

  • characterised by the insulating layers · CPC title

  • characterised by the relative positions of the source or drain electrodes with respect to the gate electrode · CPC title

  • Shapes of semiconductor bodies · CPC title

  • being Group IV materials, e.g. B-doped Si or undoped Ge · CPC title

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What does patent US9024376B2 cover?
A semiconductor device includes a pillar-shaped semiconductor having an impurity concentration of 10 17 cm −3 or less, a first insulator that surrounds the pillar-shaped semiconductor, a first metal that surrounds a portion of the first insulator at a first end of the pillar-shaped semiconductor, a second metal that surrounds a portion of the first insulator at the second end of the pillar-sh…
Who is the assignee on this patent?
Unisantis Elect Singapore Pte
What technology area does this patent fall under?
Primary CPC classification H10D30/6735. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 05 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).