Thin film transistor and manufacturing method therefor, array substrate, and display device
US-11869976-B2 · Jan 9, 2024 · US
Array substrate and method of fabricating the same
US9024323B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9024323-B2 |
| Application number | US-201213599945-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 30, 2012 |
| Priority date | Mar 29, 2012 |
| Publication date | May 5, 2015 |
| Grant date | May 5, 2015 |
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- Title
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Abstract
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Provided is an array substrate including a base substrate, a thin film transistor having a semiconductor layer disposed on a first part of the base substrate. The semiconductor layer includes a source electrode and a drain electrode, a gate electrode disposed on the semiconductor layer and insulated from the semiconductor layer. A light-blocking layer disposed between the base substrate and the thin film transistor. The light-blocking layer comprises a first layer continuously disposed on and around the first part of the base substrate, and a second layer formed on the first part of the base substrate without extending outside of the first part, the second layer being disposed on the first layer.
First claim
Opening claim text (preview).
What is claimed is: 1. An array substrate comprising: a base substrate; a thin film transistor including a semiconductor layer disposed on the base substrate, a source electrode and a drain electrode, the source electrode and the drain electrode electrically connected to the semiconductor layer, and a gate electrode disposed on the semiconductor layer and insulated from the semiconductor layer; a first layer disposed between the base substrate and the semiconductor layer, the…
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Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10D30/0314Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9024323B2 cover?
- Provided is an array substrate including a base substrate, a thin film transistor having a semiconductor layer disposed on a first part of the base substrate. The semiconductor layer includes a source electrode and a drain electrode, a gate electrode disposed on the semiconductor layer and insulated from the semiconductor layer. A light-blocking layer disposed between the base substrate and the…
- Who is the assignee on this patent?
- Oh Hwa Yeul, Seo Osung, Song Jeanho, and 3 more
- What technology area does this patent fall under?
- Primary CPC classification H10D30/0314. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue May 05 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).