Program verify word line ramping delay for lower current consumption mode
US-2024395343-A1 · Nov 28, 2024 · US
US9019770B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9019770-B2 |
| Application number | US-201313901571-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 24, 2013 |
| Priority date | Mar 26, 2013 |
| Publication date | Apr 28, 2015 |
| Grant date | Apr 28, 2015 |
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A data reading method for a rewritable non-volatile memory module is provided. The method includes applying a test voltage to a word line of the rewritable non-volatile memory module to read a plurality of verification bit data. The method also includes calculating a variation of bit data identified as a first status among the verification bit data, obtaining a new read voltage value set based on the variation, and updating a threshold voltage set for the word line with the new read voltage value set. The method further includes using the updated threshold voltage set to read data from a physical page formed by memory cells connected to the word line. Accordingly, storage states of memory cells in the rewritable non-volatile memory module can be identified correctly, thereby preventing data stored in the memory cells from losing.
Opening claim text (preview).
What is claimed is: 1. A memory read method for a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module has a plurality of memory cells, a plurality of word lines and a plurality of bit lines, each of the memory cells electrically connected to one of the word lines and one of the bit lines, each of the memory cells stores at least one bit data, each of the bit data is identified as a first state or a second state according to a voltage, and the me…
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