Vertical NAND device with shared word line steps
US-9224747-B2 · Dec 29, 2015 · US
Nonvolatile memory device and operating method thereof
US9019767B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9019767-B2 |
| Application number | US-201213398397-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 16, 2012 |
| Priority date | Feb 17, 2011 |
| Publication date | Apr 28, 2015 |
| Grant date | Apr 28, 2015 |
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Abstract
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A nonvolatile memory device includes a channel vertically extending from a substrate, a plurality of memory cells stacked along the channel; a source region connected to a first end portion of the channel, and a bit line connected to a second end portion of the channel, wherein the first end portion of the channel that adjoins the source region is formed as an undoped semiconductor layer or a semiconductor layer doped with P-type impurities.
First claim
Opening claim text (preview).
What is claimed is: 1. A nonvolatile memory device comprising: a channel vertically extending from a substrate; a plurality of memory cells stacked along the channel; a source region connected to a first end portion of the channel; and a bit line connected to a second end portion of the channel, wherein the first end portion of the channel is formed as an undoped semiconductor layer or a semiconductor layer doped with P-type impurities and is only in contact with the sourc…
Assignees
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Classifications
- H01L27/11556Primary
Electricity · mapped topic
- G11C16/14Primary
Physics · mapped topic
Physics · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9019767B2 cover?
- A nonvolatile memory device includes a channel vertically extending from a substrate, a plurality of memory cells stacked along the channel; a source region connected to a first end portion of the channel, and a bit line connected to a second end portion of the channel, wherein the first end portion of the channel that adjoins the source region is formed as an undoped semiconductor layer or a s…
- Who is the assignee on this patent?
- Aritome Seiichi, Yoo Hyun-Seung, Whang Sung-Jin, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification H01L27/11556. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Apr 28 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).