Semiconductor device, data programming device, and method for improving the recovery of bit lines of unselected memory cells for programming operation

US9019765B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9019765-B2
Application numberUS-201313918590-A
CountryUS
Kind codeB2
Filing dateJun 14, 2013
Priority dateJun 14, 2013
Publication dateApr 28, 2015
Grant dateApr 28, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A device comprises a non-volatile memory array, a first selection circuit selecting whether to make a first connection path between a first bit line and a first circuit node, and selecting whether to make a second connection path between the first bit line and a second circuit node, a power supplying circuit supplying a power supply voltage to the first circuit node, the power supply voltage being, when the first connection path is selected to be made, supplied to the first bit line, and a first voltage supplying circuit supplying a first voltage to the second circuit node, the first voltage being, when the second connection path is selected to be made, supplied to the first bit line, the first voltage and the power supply voltage being higher than a ground potential, and the first voltage being higher than the power supply voltage.

First claim

Opening claim text (preview).

What is claimed is: 1. A device comprising: a non-volatile memory array in which a program operation including a plurality of phases is performed, the non-volatile memory array including, first and second selection transistors, a plurality of memory cells coupled between the first and second selection transistors, a first bit line coupled to the first selection transistor, and a first source line coupled to the second selection transistor; first and second circuit nodes…

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What does patent US9019765B2 cover?
A device comprises a non-volatile memory array, a first selection circuit selecting whether to make a first connection path between a first bit line and a first circuit node, and selecting whether to make a second connection path between the first bit line and a second circuit node, a power supplying circuit supplying a power supply voltage to the first circuit node, the power supply voltage be…
Who is the assignee on this patent?
Ps4 Luxco Sarl
What technology area does this patent fall under?
Primary CPC classification G11C16/24. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 28 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).