Chip with electrostatic discharge protection function

US9019672B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9019672-B2
Application numberUS-201313943804-A
CountryUS
Kind codeB2
Filing dateJul 17, 2013
Priority dateJul 17, 2013
Publication dateApr 28, 2015
Grant dateApr 28, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A chip with electrostatic discharge protection function includes two power rails, a pin, a P-type FinFET, an N-type FinFET, two Fin-resistors, two diodes and an ESD unit. The pin is electrically connected to one power rail sequentially through one Fin-resistor and the P-type FinFET and electrically connected to the other power rail sequentially through the other Fin-resistor and the N-type FinFET. The two FinFETs are configured to have the control terminals thereof for receiving a transmission signal. The pin is further electrically connected to the two power rails through the two diodes, respectively. The ESD unit, electrically connected between the first and second power rails, is configured to provide an ESD path between the first and second power rails.

First claim

Opening claim text (preview).

What is claimed is: 1. A chip with electrostatic discharge (ESD) protection function, comprising: a first power rail electrically connected to a source voltage; a second power rail electrically connected to a reference voltage; a pin; a P-type FinFET comprising a first terminal, a second terminal and a first control terminal, the P-type FinFET being configured to have the first terminal thereof electrically connected to the first power rail, and the first control terminal th…

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Frequently asked questions

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What does patent US9019672B2 cover?
A chip with electrostatic discharge protection function includes two power rails, a pin, a P-type FinFET, an N-type FinFET, two Fin-resistors, two diodes and an ESD unit. The pin is electrically connected to one power rail sequentially through one Fin-resistor and the P-type FinFET and electrically connected to the other power rail sequentially through the other Fin-resistor and the N-type FinF…
Who is the assignee on this patent?
United Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification H02H9/046. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 28 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).