Integrated epitaxial structure for compound semiconductor devices

Patent metadata

Field	Value
Publication number	US-9019028-B2
Application number	US-201213661804-A
Country	US
Kind code	B2
Filing date	Oct 26, 2012
Priority date	Jun 13, 2012
Publication date	Apr 28, 2015
Grant date	Apr 28, 2015

Abstract

An integrated structure of compound semiconductor devices is disclosed. The integrated structure comprises from bottom to top a substrate, a first epitaxial layer, an etching-stop layer, a second epitaxial layer, a sub-collector layer, a collector layer, a base layer, and an emitter layer, in which the first epitaxial layer is a p-type doped layer, the second epitaxial layer is an n-type graded doping layer with a gradually increased or decreased doping concentration, and the sub-collector layer is an n-type doped layer. The integrated structure can be used to form an HBT, a varactor, or an MESFET.

First claim

The invention claimed is:

1. A integrated structure of compound semiconductor devices, sequentially comprising:
a substrate;
a first epitaxial layer made of an n-type doped layer formed on said substrate;
a second epitaxial layer made of an n-type graded doping layer formed on said first epitaxial layer with a doping concentration gradually increased or decreased from bottom to top;
a third epitaxial layer made of a p-type doped layer formed on said second epitaxial layer;…

Assignees

• Win Semiconductors Corp

Inventors

• Lin Cheng-Kuo
• Li Szu-Ju
• Syu Rong-Hao
• Tsai Shu-Hsiao

Classifications

• H10D84/05

  Electricity · mapped topic

• H10D62/852

  Electricity · mapped topic

• H10D62/824 Primary

  Electricity · mapped topic

• H10D62/85

  Electricity · mapped topic

• H10D1/64 Primary

  Electricity · mapped topic