Reducing parasitic interactions in a qubit grid for surface code error correction
US-2024378473-A1 · Nov 14, 2024 · US
US9018979B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9018979-B2 |
| Application number | US-201313930756-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 28, 2013 |
| Priority date | Apr 17, 2007 |
| Publication date | Apr 28, 2015 |
| Grant date | Apr 28, 2015 |
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A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.
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What is claimed is: 1. A method comprising: arranging a plurality of digital blocks into one or more groups, each group comprising two or more group of two or more digital blocks; programming, by a micro-controller system, a first set of interconnection elements of a programmable interconnect to couple at least the two digital blocks of the one or more groups together; programming, by the micro-controller system, segmentation elements of the programmable interconnect to couple…
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