Chip packaging method, chip packaging module, and embedded substrate chip packaging structure
US-2024413138-A1 · Dec 12, 2024 · US
US9018741B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9018741-B2 |
| Application number | US-201313739565-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 11, 2013 |
| Priority date | Apr 12, 2012 |
| Publication date | Apr 28, 2015 |
| Grant date | Apr 28, 2015 |
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A semiconductor package is presented which has a suitable structure for effectively shielding electromagnetic wave interference (EMI) in a cavity area to which a semiconductor chip is attached. The semiconductor package is assembled such that a lower substrate to which the semiconductor chip is attached is adhered to an EMI shielding & electric I/O body having various types of EMI shielding & electric I/O metal patterns by soldering. Further, the EMI shielding & electric I/O body is adhered to an upper substrate by soldering thereby simplifying assembling of the semiconductor package.
Opening claim text (preview).
What is claimed is: 1. A semiconductor package comprising: a lower substrate; a semiconductor chip coupled to a cavity area of the lower substrate; an electromagnetic wave interference (EMI) shielding & electric input/output (I/O) body formed to surround the cavity area and coupled to the lower substrate; and an upper substrate coupled to the EMI shielding & electric I/O body, wherein the EMI shielding & electric I/O body comprises: an EMI shielding & electric I/O hole fo…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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