Light emitting device

US9018656B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9018656-B2
Application numberUS-201013201853-A
CountryUS
Kind codeB2
Filing dateFeb 23, 2010
Priority dateFeb 24, 2009
Publication dateApr 28, 2015
Grant dateApr 28, 2015

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The light emitting device comprises a mounting substrate and an LED chip which comprises an n-type nitride semiconductor layer, a nitride light emission layer on the n-type nitride semiconductor layer, p-type nitride semiconductor layer on the nitride light emission layer, an anode electrode opposite of the nitride light emission layer from the p-type nitride semiconductor layer, and a cathode electrode on the n-type nitride semiconductor layer. The mounting substrate has a patterned conductor which is connected to the cathode electrode through a bump and also connected to the anode electrode through a bump. The LED chip further comprises one or more dielectric layer between the p-type nitride semiconductor layer and the anode electrode to have an arrangement which resembles an island. The p-type nitride semiconductor layer has a first region which is overlapped with the bump. The dielectric layer is not formed within the first region.

First claim

Opening claim text (preview).

The invention claimed is: 1. A light emitting device comprising: an LED chip and a mounting substrate, said LED chip comprising an n-type nitride semiconductor layer, a nitride light emission layer, a p-type nitride semiconductor layer, an anode electrode, and a cathode electrode, said n-type nitride semiconductor layer having a first surface, said nitride light emission layer being disposed on said first surface of said n-type nitride semiconductor layer, said p-type nitr…

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What does patent US9018656B2 cover?
The light emitting device comprises a mounting substrate and an LED chip which comprises an n-type nitride semiconductor layer, a nitride light emission layer on the n-type nitride semiconductor layer, p-type nitride semiconductor layer on the nitride light emission layer, an anode electrode opposite of the nitride light emission layer from the p-type nitride semiconductor layer, and a cathode …
Who is the assignee on this patent?
Murai Akihiko, Yasuda Masaharu, Iwahashi Tomoya, and 2 more
What technology area does this patent fall under?
Primary CPC classification H10H20/814. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 28 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).