Process for manufactuirng super-barrier rectifiers

Patent metadata

Field	Value
Publication number	US-9018048-B2
Application number	US-201314032123-A
Country	US
Kind code	B2
Filing date	Sep 19, 2013
Priority date	Sep 27, 2012
Publication date	Apr 28, 2015
Grant date	Apr 28, 2015

Abstract

A process for manufacturing a semiconductor device, wherein a semiconductor layer is formed on a body of semiconductor material; a first mask is formed on the semiconductor layer; a first conductive region is implanted in the body using the first mask; a second mask is formed laterally and complementarily to the first mask, at least in a projection in a plane parallel to the surface of the body; a second conductive region is implanted in the body using the second mask, in an adjacent and complementary position to the first conductive region; spacers are formed on the sides of the second mask region, to form a third mask aligned to the second mask; and, using the third mask, portions of the semiconductor layer are removed to form a gate region.

First claim

The invention claimed is:

1. A process for manufacturing a semiconductor device, comprising:
forming a semiconductor layer on a surface of a semiconductor body;
forming a first mask on the semiconductor layer;
forming a first conductive region in the body by introducing a first dopant species into the body using the first mask;
forming a second mask laterally and complementarily to the first mask, at least in a projection in a plane parallel to the surface of the body;
for…

Assignees

• St Microelectronics Srl

Inventors

• Lizio Francesco

Classifications

• H10P30/222

  Electricity · mapped topic

• H10P30/22 Primary

  Electricity · mapped topic

• H10D64/256

  Electricity · mapped topic

• H10D62/157

  Electricity · mapped topic

• H10D30/66

  Electricity · mapped topic