Method and system for testing jitter compatibility

US9014552B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9014552-B2
Application numberUS-201013810226-A
CountryUS
Kind codeB2
Filing dateDec 28, 2010
Priority dateJul 15, 2010
Publication dateApr 21, 2015
Grant dateApr 21, 2015

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Abstract

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A method and system for testing jitter compatibility are disclosed in the present invention, which includes: an interconnection testing board configured with a non-NRZ optical transponder needing to satisfy the board jitter performance specification, and according to the specification, testing the jitter performance of the interconnection testing board to indirectly judge whether the jitter compatibility of non-NRZ optical transponder at a line side of the interconnection testing board is qualified, wherein: at the line side and a client side of the interconnection testing board, a non-NRZ optical transponder to be tested and an NRZ optical transponder with qualified jitter performance are configured respectively, and the jitter performance of interconnection testing board is tested; if the qualified jitter performance of interconnection testing board is obtained through testing, believing that the jitter compatibility of non-NRZ optical transponder to be tested is qualified.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for testing jitter performance of a non-No Return Zero (NRZ) optical transponder, comprising: configuring an interconnection testing board by placing the non-NRZ optical transponder to be tested at a line side of the interconnection testing board and placing a NRZ optical transponder at a client side of the interconnection testing board, wherein the jitter performance of said NRZ optical transponder satisfies a pre-defined standard, and it has been…

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What does patent US9014552B2 cover?
A method and system for testing jitter compatibility are disclosed in the present invention, which includes: an interconnection testing board configured with a non-NRZ optical transponder needing to satisfy the board jitter performance specification, and according to the specification, testing the jitter performance of the interconnection testing board to indirectly judge whether the jitter com…
Who is the assignee on this patent?
Li Meng, Zte Corp
What technology area does this patent fall under?
Primary CPC classification H04B10/0775. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 21 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).