Pixel circuit and display panel
US-2024428730-A1 · Dec 26, 2024 · US
Display device
US9013377B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9013377-B2 |
| Application number | US-201314107498-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 16, 2013 |
| Priority date | May 12, 2000 |
| Publication date | Apr 21, 2015 |
| Grant date | Apr 21, 2015 |
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Abstract
Official abstract text for this publication.
There is provided an active matrix EL display device that can display a clear multi gray-scale color display to reduce the shift in the potential caused by the potential drop due to the wiring resistance of a power source supply line, in order to decrease the unevenness in a display region. A plurality of drawing out ports of the power source supply line are arranged. Further, in the wiring resistance between the external input terminal and the pixel portion power source supply line, potential compensation is performed by supplying potential to the power source supply line by a feedback amplifier. Further, in addition to above structure, the power source supply line may be arranged in a matrix.
First claim
Opening claim text (preview).
What is claimed is: 1. A display device comprising: a plurality of power supply lines comprising a plurality of first power supply lines disposed in a direction parallel to a source signal line and a plurality of second power supply lines disposed in a direction perpendicular to the source signal line; and a pixel electrode, wherein the plurality of power supply lines comprises a first wiring and a second wiring, wherein the first wiring is over a first insulating film forme…
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Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9013377B2 cover?
- There is provided an active matrix EL display device that can display a clear multi gray-scale color display to reduce the shift in the potential caused by the potential drop due to the wiring resistance of a power source supply line, in order to decrease the unevenness in a display region. A plurality of drawing out ports of the power source supply line are arranged. Further, in the wiring res…
- Who is the assignee on this patent?
- Semiconductor Energy Lab
- What technology area does this patent fall under?
- Primary CPC classification G09G3/3225. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Apr 21 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).