Oscillator circuits and methods to compensate frequency pulling
US-2015381186-A1 · Dec 31, 2015 · US
US9013232B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9013232-B2 |
| Application number | US-201213731672-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 31, 2012 |
| Priority date | Oct 11, 2000 |
| Publication date | Apr 21, 2015 |
| Grant date | Apr 21, 2015 |
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A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.
Opening claim text (preview).
What is claimed is: 1. A method of reducing interference present in a circuit formed on an integrated circuit comprising the steps of: placing a first conductive strip above a conductive trace on the circuit adapted to carry high frequency digital current; placing a second conductive strip below the conductive trace; placing a third conductive strip in proximity to the conductive trace, the third conductive strip forming at least a part of a first side of a conduit to shield t…
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