Countermeasure method and device for protecting data circulating in an electronic microcircuit
US-9223368-B2 · Dec 29, 2015 · US
Method and apparatus for chip self deactivation
US9013207B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9013207-B2 |
| Application number | US-201213728772-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 27, 2012 |
| Priority date | Dec 27, 2012 |
| Publication date | Apr 21, 2015 |
| Grant date | Apr 21, 2015 |
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Abstract
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In some embodiments, provided is a processor chip including self deactivation logic to deactivate the processor chip after a threshold of qualified events have been monitored.
First claim
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What is claimed is: 1. An apparatus, comprising: a processor chip including self deactivation logic to deactivate the processor chip after a threshold of qualified events have been monitored, wherein the deactivation logic can be updated by way of an externally provided programming code. 2. The apparatus of claim 1 , wherein the deactivation logic comprises an event filter to evaluate internal event data to determine whether a qualified event has occurred.…
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- H03K19/003Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9013207B2 cover?
- In some embodiments, provided is a processor chip including self deactivation logic to deactivate the processor chip after a threshold of qualified events have been monitored.
- Who is the assignee on this patent?
- Intel Corp
- What technology area does this patent fall under?
- Primary CPC classification H03K19/003. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Apr 21 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).