MRAM with sidewall protection and method of fabrication

Patent metadata

Field	Value
Publication number	US-9013045-B2
Application number	US-201414242562-A
Country	US
Kind code	B2
Filing date	Apr 1, 2014
Priority date	Aug 1, 2011
Publication date	Apr 21, 2015
Grant date	Apr 21, 2015

Abstract

BEOL memory cells are described that include one or more sidewall protection layers on the memory device (including, for example, an MTJ element) deposited prior to interconnect via etching to prevent the formation of electrical shorts between layers. One embodiment uses a single layer sidewall protection sleeve that is deposited after the memory device has been patterned. The layer material is vertically etched down to expose the upper surface of the top electrode while leaving a residual layer of protective material surrounding the rest of the memory device. The material for the protection layer is selected to resist the etchant used to remove the first dielectric material from the via in the subsequent interconnect process. A second embodiment uses dual-layer sidewall protection in which the first layer covers the memory element is preferably an oxygen-free dielectric and the second layer protects the first layer during via etching. In either the first or second embodiments a single layer or a dual layer etch stop layer structure can be deposited over the wafer after the sidewall protection sleeve has been formed and before the inter-layer dielectric (ILD) is deposited.

First claim

The invention claimed is:

1. A memory cell formed on a substrate comprising:
a memory device disposed centrally in the memory cell, the memory device including a top electrode; a memory element having a plurality of layers; and a bottom electrode;
a sidewall protection sleeve including at least a first layer of a first dielectric material disposed around sidewalls of the memory element and the bottom electrode, the sidewall protection sleeve generally conforming to a shape of th…

Assignees

• Avalanche Technology Inc
• Avalanche Technology Inc

Inventors

• Satoh Kimihiro
• Huai Yiming
• Zhang Jing
• Abedifard Ebrahim

Classifications

• H10W20/42 Primary

  Electricity · mapped topic

• H01L2924/00

  Electricity · mapped topic

• H01L45/1675

  Electricity · mapped topic

• H01L45/06

  Electricity · mapped topic

• H01L23/5226 Primary

  Electricity · mapped topic