Semiconductor structure with flush shallow trench isolation and gate oxide and method of manufacturing the same
US-2024395883-A1 · Nov 28, 2024 · US
US9012991B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9012991-B2 |
| Application number | US-201414449806-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 1, 2014 |
| Priority date | Aug 5, 2013 |
| Publication date | Apr 21, 2015 |
| Grant date | Apr 21, 2015 |
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A semiconductor device includes an N − -type well 13 , a P-type body diffusion layer 14 , an N + -type source diffusion layer 18 , an N + -type drain diffusion layer 19 , and a P + -type body contact region 32 . A plurality of the P + -type body contact regions 32 are located along gate electrodes 17 a and 17 b , a plurality of first contact holes 25 are located along the gate electrodes, and a plurality of second contact holes 27 are located along the gate electrodes. The pitch of the plurality of P + -type body contact regions 32 is larger than the pitch of the plurality of first contact holes 25.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a first conductivity type first diffusion layer located in a semiconductor layer; a gate electrode located over the first diffusion layer and the semiconductor layer via a gate insulation film; a second conductivity type second diffusion layer that is one of a source region and a drain region, and is located in the first diffusion layer to one side of the gate electrode in a channel length direction; a second conducti…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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