Semiconductor structure with flush shallow trench isolation and gate oxide and method of manufacturing the same
US-2024395883-A1 · Nov 28, 2024 · US
US9012979B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9012979-B2 |
| Application number | US-201313832084-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 15, 2013 |
| Priority date | Mar 12, 2013 |
| Publication date | Apr 21, 2015 |
| Grant date | Apr 21, 2015 |
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A semiconductor device and method of manufacturing the same are provided. A device can include an LDMOS region and a high side region on a semiconductor substrate. The device can further include an insulating region separating the LDMOS region from the high side region and the insulating region can include a plurality of second conductive type wells, a plurality of second conductive type buried layer patterns, or both.
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What is claimed is: 1. A semiconductor device, comprising: a lateral double diffused metal oxide semiconductor (LDMOS) region on a semiconductor substrate; a high side region on the semiconductor substrate; and an insulating region laterally separating the LDMOS region from the high side region, wherein the LDMOS region comprises a gate, a first first-conductive-type diffusion region, and a first second-conductive-type diffusion region, wherein the high side region compris…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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