Semiconductor memory device
US-2024334693-A1 · Oct 3, 2024 · US
US9012971B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9012971-B2 |
| Application number | US-201213714264-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 13, 2012 |
| Priority date | Nov 9, 2012 |
| Publication date | Apr 21, 2015 |
| Grant date | Apr 21, 2015 |
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Official abstract text for this publication.
A semiconductor device includes a channel layer protruding from a substrate and having protrusions extending from a sidewall thereof. Floating gates surrounding the channel layer are provided between the protrusions. Control gates surrounding the floating gates are stacked along the channel layer. Interlayer insulating layers are interposed between the control gates stacked along the channel layer. A level difference exists between a lateral surface of each of the floating gates, and a lateral surface of each of the protrusions.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device, comprising: a channel layer protruding from a substrate and having protrusions extending from a sidewall thereof and concaves provided between the protrusions; floating gates surrounding the channel layer and disposed in the concaves to be separate from each other; control gates surrounding the floating gates, respectively; and interlayer insulating layers surrounding the protrusions and interposed between the control gates, w…
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