Capacitively coupled electrodeless plasma apparatus and a method using capacitively coupled electrodeless plasma for processing a silicon substrate
US-2015372167-A1 · Dec 24, 2015 · US
Process for producing photovoltaic device
US9012256B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9012256-B2 |
| Application number | US-201113808738-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 28, 2011 |
| Priority date | Oct 6, 2010 |
| Publication date | Apr 21, 2015 |
| Grant date | Apr 21, 2015 |
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Abstract
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A process for producing a photovoltaic device that can improve the power generation characteristics of a solar cell having a heterojunction composed of a p-type crystalline Ge (substrate), an i-type amorphous silicon semiconductor layer, and an n-type amorphous silicon semiconductor layer. A process for producing a photovoltaic device ( 100 ) comprising a heterojunction cell ( 1 ) prepared by sequentially stacking an i-type amorphous silicon semiconductor layer ( 12 ) and an n-type amorphous silicon semiconductor layer ( 13 ) on top of a substrate (p-type crystalline Ge ( 11 )), the process comprising a PH 3 exposure treatment stage of adjusting the temperature of the substrate ( 11 ), from which a surface oxide film has been removed, to a prescribed temperature, and subsequently placing the substrate in a vacuum chamber and exposing the substrate to PH 3 , an i-layer deposition stage of depositing the i-type amorphous silicon semiconductor layer ( 12 ) on the PH 3 -exposed substrate, an n-layer deposition stage of depositing the n-type amorphous silicon semiconductor layer ( 13 ) on the i-type amorphous silicon semiconductor layer ( 12 ), and an electrode formation stage of forming electrodes ( 2, 3, 4 ) on the surface of the n-type amorphous silicon semiconductor layer, and on the back surface of the substrate ( 11 ).
First claim
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The invention claimed is: 1. A process for producing a photovoltaic device comprising a p-type crystalline Ge as a substrate, and a heterojunction cell prepared by sequentially stacking an i-type amorphous silicon semiconductor layer and an n-type amorphous silicon semiconductor layer on top of the substrate, the process comprising: a PH 3 exposure treatment stage of adjusting a temperature of the substrate, from which an oxide film formed on a surface thereof has been removed, t…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10F71/103Primary
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9012256B2 cover?
- A process for producing a photovoltaic device that can improve the power generation characteristics of a solar cell having a heterojunction composed of a p-type crystalline Ge (substrate), an i-type amorphous silicon semiconductor layer, and an n-type amorphous silicon semiconductor layer. A process for producing a photovoltaic device ( 100 ) comprising a heterojunction cell ( 1 ) prepared by s…
- Who is the assignee on this patent?
- Nakano Shinya, Takeuchi Yoshiaki, Kondo Michio, and 3 more
- What technology area does this patent fall under?
- Primary CPC classification H10F71/103. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Apr 21 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).