Glass composition for protecting semiconductor junction, method of manufacturing semiconductor device and semiconductor device

US9006113B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9006113-B2
Application numberUS-201113811447-A
CountryUS
Kind codeB2
Filing dateAug 29, 2011
Priority dateAug 29, 2011
Publication dateApr 14, 2015
Grant dateApr 14, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A glass composition for protecting a semiconductor junction contains at least SiO 2 , Al 2 O 3 , MO, and nickel oxide, and substantially contains none of Pb, P, As, Sb, Li, Na and K (M in MO indicates one of alkali earth metals).

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of manufacturing a semiconductor device comprising: a first step of preparing a semiconductor element having a pn junction exposure portion where a pn junction is exposed; and a second step of depositing a glass layer such that the deposited glass layer covers the pn junction exposure portion, wherein in the second step, the deposited glass layer is formed of a glass composition for protecting a semiconductor junction, which is made of fine glass particles prepared from a material in a molten state obtained by melting a raw material mixture which contains at least SiO2, Al2O3, MO, and nickel oxide, and substantially contains none of Pb, P, As, Sb, Li, Na and K; and where M corresponds to an alkaline earth metal. 2. The method of manufacturing a semiconductor device according to claim 1 , wherein the first step comprises: a step of preparing a semiconductor substrate having a pn junction arranged parallel to a main surface of the semiconductor substrate; and a step of forming a trench having a depth which goes beyond the pn junction as measured from one surface of the semiconductor substrate thus forming the pn junction exposure portion in the inside of the trench, and the second step comprises a step of depositing the glass layer such that the glass layer covers the pn junction exposure portion in the inside of the trench. 3. The method of manufacturing a semiconductor device according to claim 2 , wherein the second step comprises a step of depositing the glass layer such that the glass layer directly contacts the pn junction exposure portion in the inside of the trench. 4. The method of manufacturing a semiconductor device according to claim 1 , wherein the first step comprises a step of forming the pn junction exposure portion on a surface of a semiconductor substrate, and the second step comprises a step of depositing the glass layer such that the glass layer covers the pn junction exposure portion on the surface of the semiconductor substrate. 5. The method of manufacturing a semiconductor device according to claim 4 , wherein the second step comprises a step of depositing the glass layer such that the glass layer directly contacts the pn junction exposure portion on the surface of the semiconductor substrate. 6. The method of manufacturing a semiconductor device according to claim 1 , wherein the glass composition for protecting a semiconductor junction also contains CaO and MgO, and is set such that the content of SiO2 is set to a value which falls within a range of 53 mol % to 73 mol %, the content of Al2O3 is set to a value which falls within a range of 11 mol % to 21 mol %, a content of CaO is set to a value which falls within a range of 3 mol % to 9 mol %, further comprising a content of MgO which is set to a value which falls within a range of 11 mol % to 21 mol %, and the content of nickel oxide is set to a value which falls within a range of 0.01 mol % to 3 mol %. 7. The method of manufacturing the semiconductor device according to claim 1 , wherein the glass composition for protecting a semiconductor junction also contains CaO, ZnO and B2O3 and is set such that the content of SiO2 is set to a value which falls within a range of 32 mol % to 48 mol %, the content of Al2O3 is set to a value which falls within a range of 9 mol % to 13 mol %, a content of CaO is set to a value which falls within a range of 15 mol % to 23 mol %, further comprising a content of ZnO which is set to a value which falls within a range of 18 mol % to 28 mol %, further comprising a content of B2O3 which is set to a value which falls within a range of 3 mol % to 10 mol %, and the content of nickel oxide is set to a value which falls within a range of 0.01 mol % to 3 mol %.

Assignees

Inventors

Classifications

  • the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides · CPC title

  • H10P14/47Primary

    Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title

  • of isolation regions comprising PN junctions · CPC title

  • Isolation regions comprising PN junctions · CPC title

  • H10D62/10Primary

    Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies · CPC title

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Frequently asked questions

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What does patent US9006113B2 cover?
A glass composition for protecting a semiconductor junction contains at least SiO 2 , Al 2 O 3 , MO, and nickel oxide, and substantially contains none of Pb, P, As, Sb, Li, Na and K (M in MO indicates one of alkali earth metals).
Who is the assignee on this patent?
Ogasawara Atsushi, Ito Kazuhiko, Ito Koji, and 1 more
What technology area does this patent fall under?
Primary CPC classification H10P14/47. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 14 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).