Memory system, semiconductor device and fabrication method therefor
US-2024107759-A1 · Mar 28, 2024 · US
US9006089B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9006089-B2 |
| Application number | US-201414524545-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 27, 2014 |
| Priority date | Dec 29, 2011 |
| Publication date | Apr 14, 2015 |
| Grant date | Apr 14, 2015 |
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The technology of the present invention relates to a non-volatile memory device and a fabrication method thereof. The non-volatile memory device includes channel layers protruding vertically from a substrate, a plurality of hole-supply layers and a plurality of gate electrodes, which are alternately stacked along the channel layers, and a memory film interposed between the channel layers and the gate electrodes and between the hole-supply layers and the gate electrodes. According to this technology, the hole-supply layers are formed between the memory cells such that sufficient holes are supplied to the memory cells during the erase operation of the memory cells, whereby the erase operation of the memory cells is smoothly performed without using the GIDL current, and the properties of the device are protected from being deteriorated due to program/erase cycling.
Opening claim text (preview).
What is claimed is: 1. A method for fabricating a non-volatile memory device, comprising: forming an interlayer insulating film over a substrate; alternately stacking a plurality of hole-supply layers and a plurality of sacrificial layers over the interlayer insulating film; selectively etching the hole-supply layers and the sacrificial layers to form channel holes which expose the substrate; forming a channel layer in each of the channel holes; forming a slit hole through…
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