Memory performance evaluation using address mapping information
US-2024394164-A1 · Nov 28, 2024 · US
US9003262B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9003262-B2 |
| Application number | US-201213428231-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 23, 2012 |
| Priority date | Mar 24, 2011 |
| Publication date | Apr 7, 2015 |
| Grant date | Apr 7, 2015 |
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An operating method of a memory controller includes classifying a plurality of blocks in a memory cell array included in a flash memory into a first group and a second group according to the number of error bits in data programmed to each of the blocks, and creating a combinational block by combining a first block from the first group with a second block from the second group.
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What is claimed is: 1. An operating method of a memory controller, the method comprising: classifying a plurality of blocks of a memory cell array included in a flash memory into a first group and a second group according to a number of error bits in data programmed to each of the plurality of blocks; and creating a combinational block by combining a first block from the first group with a second block from the second group. 2. The method of claim 1 , furt…
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