Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US8999846B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8999846-B2 |
| Application number | US-201414255037-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 17, 2014 |
| Priority date | Apr 30, 2012 |
| Publication date | Apr 7, 2015 |
| Grant date | Apr 7, 2015 |
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Official abstract text for this publication.
An integrated circuit structure includes a plurality of insulator layers (connected to each other) that form a laminated structure. Further included are via openings within each of the insulator layers, and conductive via material within the via openings. The conductive via material within corresponding via openings of adjacent insulator layers are electrically connected to form continuous electrical via paths through the insulator layers between the top surface and the bottom surface of the laminated structure. Within each of the continuous electrical via paths, the via openings are positioned relative to each other to form a diagonal structural path of the conductive via material through the laminated structure. The corresponding via openings of the adjacent insulator layers partially overlap each other. The diagonal structural paths are non-perpendicular to the top surface and the bottom surface.
Opening claim text (preview).
What is claimed is: 1. A method of forming an integrated circuit structure comprising: forming via openings in an insulator layer; forming conductive via material within said via openings; and forming a laminated structure of insulator layers on said insulator layer, said forming of said laminated structure of insulator layers comprising: successively forming said insulator layers on one another; repeating said forming of said via openings in each said insulator layers; p…
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