Methods of manufacturing semiconductor devices
US-2024332030-A1 · Oct 3, 2024 · US
Apparatuses including stair-step structures and methods of forming the same
US8999844B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8999844-B2 |
| Application number | US-201314015696-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 30, 2013 |
| Priority date | Jun 2, 2011 |
| Publication date | Apr 7, 2015 |
| Grant date | Apr 7, 2015 |
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Abstract
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Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material, forming a first mask over the sets, forming a first number of contact regions, forming a second mask over a first region of the sets, and removing material from of the sets in a second, exposed region laterally adjacent the first region to form a second number of contact regions. Another method includes forming first and second contact regions on portions of sets of conductive materials and insulating materials, each of the second contact regions more proximal to an underlying substrate than each of the first contact regions. Apparatuses such as memory devices including laterally adjacent first and second regions each of which including contact regions of a different portion of a plurality of conductive materials and related methods of forming such devices are also disclosed.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of forming a semiconductor structure, comprising: forming a stack of conductive materials over a substrate wherein adjacent conductive materials of the stack are separated from each other by a respective insulating material; forming first contact regions over portions of the conductive materials to form a stair step structure extending from a top first contact region to a bottom first contact region; and removing portions of half of the conducti…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8999844B2 cover?
- Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material, forming a first mask over the sets, forming a first number of contact regions, forming a second mask over a first region of the sets, and removing material from of the sets in a second, exposed region laterally adjacent the first region to for…
- Who is the assignee on this patent?
- Micron Technology Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W20/031. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Apr 07 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).