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Electronic fuse having an insulation layer
US8999767B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8999767-B2 |
| Application number | US-201313755030-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 31, 2013 |
| Priority date | Jan 31, 2013 |
| Publication date | Apr 7, 2015 |
| Grant date | Apr 7, 2015 |
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Abstract
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A method including etching a dual damascene feature in a dielectric layer, the dual damascene feature including a first via opening, a second via opening, and a trench opening, forming a seed layer within the dual damascene feature, the seed layer including a conductive material, and heating the seed layer causing the seed layer to reflow and fill the first via opening, fill the second via opening, and partially fill the trench opening to form a first via, a second via, and a fuse line, respectively, wherein the seed layer no longer remains along an entire length of a sidewall of the trench opening. The method further including forming an insulating layer on top of the fuse line, and forming a fill material on top of the insulating layer and substantially filling the trench opening.
First claim
Opening claim text (preview).
What is claimed is: 1. A method comprising: etching a dual damascene feature in a dielectric layer, the dual damascene feature comprising a first via opening, a second via opening, and a trench opening; forming a seed layer within the dual damascene feature, the seed layer comprising a conductive material; heating the seed layer causing the seed layer to reflow and fill the first via opening, fill the second via opening, and partially fill the trench opening to form a first vi…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8999767B2 cover?
- A method including etching a dual damascene feature in a dielectric layer, the dual damascene feature including a first via opening, a second via opening, and a trench opening, forming a seed layer within the dual damascene feature, the seed layer including a conductive material, and heating the seed layer causing the seed layer to reflow and fill the first via opening, fill the second via open…
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification H10W20/493. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Apr 07 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).