Methods to prevent filler entrapment in microelectronic device to microelectronic substrate interconnection structures

Patent metadata

Field	Value
Publication number	US-8999765-B2
Application number	US-201313925967-A
Country	US
Kind code	B2
Filing date	Jun 25, 2013
Priority date	Jun 25, 2013
Publication date	Apr 7, 2015
Grant date	Apr 7, 2015

Abstract

Embodiments of the present description include methods for attaching a microelectronic device to a microelectronic substrate with interconnection structures after disposing of an underfill material on the microelectronic device, wherein filler particles within the underfill material may be repelled away from the interconnection structures prior to connecting the microelectronic device to the microelectronic structure. These methods may include inducing a charge on the interconnection structures and may include placing the interconnection structures between opposing plates and producing a bias between the opposing plates after depositing the underfill material on the interconnection structures.

First claim

What is claimed is:

1. A method, comprising:
providing a microelectronic device having an active surface and an opposing back surface with at least one interconnection structure extending from the microelectronic device active surface;
disposing an underfill material over the microelectronic device active surface and the at least one microelectronic device interconnection structure which forms an outer surface opposing the microelectronic device active surface, wherein the under…

Assignees

• Intel Corp

Inventors

• Dubey Manish
• Dias Rajendra C
• Xiu Yonghao
• Krishnan Arjun
• Bai Yiqun
• Muthur Srinath Purushotham Kaushik

Classifications

• H10W99/00

  Electricity · mapped topic

• H10W74/15

  Electricity · mapped topic

• H10W74/012 Primary

  Electricity · mapped topic

• H01L21/563 Primary

  Electricity · mapped topic