Semiconductor device

US8999750B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8999750-B2
Application numberUS-201313919615-A
CountryUS
Kind codeB2
Filing dateJun 17, 2013
Priority dateDec 5, 2008
Publication dateApr 7, 2015
Grant dateApr 7, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes an oxide semiconductor layer provided over a substrate having an insulating surface; a gate insulating film covering the oxide semiconductor layer; a first conductive layer and a second conductive layer laminated in this order over the gate insulating film; an insulating film covering the oxide semiconductor layer and a gate wiring including a gate electrode (the first and second conductive layers); and a third conductive layer and a fourth conductive layer laminated in this order over the insulating film and electrically connected to the oxide semiconductor layer. The gate electrode is formed using the first conductive layer. The gate wiring is formed using the first conductive layer and the second conductive layer. A source electrode is formed using the third conductive layer. A source wiring is formed using the third conductive layer and the fourth conductive layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a semiconductor device comprising the steps of: forming an oxide semiconductor film over a substrate; forming a silicon nitride film over the oxide semiconductor film; forming a silicon oxide film over the silicon nitride film; removing part of the silicon oxide film; forming a conductive film having a light-transmitting property over the silicon oxide film; forming a resist mask using a multi-tone mask over the oxide sem…

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What does patent US8999750B2 cover?
A semiconductor device includes an oxide semiconductor layer provided over a substrate having an insulating surface; a gate insulating film covering the oxide semiconductor layer; a first conductive layer and a second conductive layer laminated in this order over the gate insulating film; an insulating film covering the oxide semiconductor layer and a gate wiring including a gate electrode (the…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification G02F1/1368. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 07 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).