LDPC decoder trapping set identification

US8996971B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8996971-B2
Application numberUS-201213602440-A
CountryUS
Kind codeB2
Filing dateSep 4, 2012
Priority dateSep 4, 2012
Publication dateMar 31, 2015
Grant dateMar 31, 2015

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Abstract

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The present inventions are related to systems and methods for detecting trapping sets in LDPC decoders, and particularly for detecting variable nodes in trapping sets in a non-erasure channel LDPC decoder.

First claim

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What is claimed is: 1. An apparatus comprising: a low density parity check decoder operable to iteratively generate and process check node to variable node messages and variable node to check node messages, and to identify trapping sets based at least in part on disagreements between the check node to variable node messages, wherein the low density parity check decoder comprises a non-erasure channel decoder. 2. The apparatus of claim 1 , wherein the low den…

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What does patent US8996971B2 cover?
The present inventions are related to systems and methods for detecting trapping sets in LDPC decoders, and particularly for detecting variable nodes in trapping sets in a non-erasure channel LDPC decoder.
Who is the assignee on this patent?
Zhang Fan, Bolotov Anatoli A, Ivanovic Lav D, and 1 more
What technology area does this patent fall under?
Primary CPC classification H03M13/1102. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).