Error correction device and error correction method

Patent metadata

Field	Value
Publication number	US-8996966-B2
Application number	US-201313957672-A
Country	US
Kind code	B2
Filing date	Aug 2, 2013
Priority date	Feb 27, 2013
Publication date	Mar 31, 2015
Grant date	Mar 31, 2015

Abstract

According to one embodiment, an error correction device includes a syndrome processing unit, a generation unit, and a search processing unit. The syndrome processing unit generates a syndrome value based on received data. The generation unit generates t (t is a maximum number of correctable bits) coefficient values of an error position polynomial based on the syndrome value. The search processing unit calculates a root of the error position polynomial, with a concurrency of computation being equal to or greater than “2”, by using the coefficient values of the error position polynomial, when a number of error bits is not more than a predetermined value s (1<=s<t). The search processing unit calculates the root of the error position polynomial, with a concurrency of computation being “1”, when the number of error bits exceeds the predetermined value s.

First claim

What is claimed is:

1. An error correction device comprising:
a syndrome processing unit configured to generate a syndrome value based on received data;
a generation unit configured to generate t (t is a maximum number of correctable bits) coefficient values of an error position polynomial based on the syndrome value; and
a search processing unit configured to calculate a root of the error position polynomial, with a concurrency of computation being equal to or greater than “2…

Assignees

• Toshiba Kk

Inventors

• Matsuoka Teruyuki
• Ishikawa Yukio
• Ukyou Tsuyoshi
• Yang Fuying
• Kitazume Toshihiko

Classifications

• G06F11/08 Primary

  Physics · mapped topic

• H03M13/151 Primary

  Electricity · mapped topic

• H03M13/1545 Primary

  Electricity · mapped topic