System for performing the test of digital circuits

Patent metadata

Field	Value
Publication number	US-8996939-B2
Application number	US-201113090171-A
Country	US
Kind code	B2
Filing date	Apr 19, 2011
Priority date	Apr 20, 2010
Publication date	Mar 31, 2015
Grant date	Mar 31, 2015

Abstract

A system includes a controller configured for executing the test of the digital circuit, a memory configured for storing a status of the digital circuit, and a state machine configured for controlling, before the execution of the test, the storage into the memory of the status of the digital circuit and configured for controlling, after the execution of the test, restoring the status of the digital circuit based on the status stored in the memory.

First claim

The invention claimed is:

1. A system, comprising:
a controller, which, in operation, is coupled to a digital circuit and executes a series of tests of the digital circuit;
a memory; and
a state machine, which, in operation:
controls storing of a pre-test status of the digital circuit into the memory, just before the series of tests are executed, wherein the pre-test status is obtained from the digital circuit via one or more scan chains of the digital circuit;
controls seq…

Assignees

• Casarsa Marco
• St Microelectronics Srl

Inventors

• Casarsa Marco

Classifications

• G01R31/31701

  Physics · mapped topic

• G01R31/31724 Primary

  Physics · mapped topic

• G01R31/318555

  Physics · mapped topic