Memory operation of paired memory devices

Patent metadata

Field	Value
Publication number	US-8996935-B2
Application number	US-201213707675-A
Country	US
Kind code	B2
Filing date	Dec 7, 2012
Priority date	Dec 7, 2012
Publication date	Mar 31, 2015
Grant date	Mar 31, 2015

Abstract

A method and apparatus for operation of a memory module for storage of a data word is provided. The apparatus includes a memory module having a set of paired memory devices including a first memory device to store a first section of a data word and a second memory device to store a second section of the data word when used in failure free operation. The apparatus may further include a first logic module to perform a write operation by writing the first and second sections of the data word to both the first memory device and the second memory device upon the determination of certain types of failure. The determination may include that a failure exists in the word section storage of either the first or second memory devices but that no failures exist in equivalent locations of word section storage in the two memory devices.

First claim

What is claimed is:

1. A method comprising:
receiving by a memory buffer a write operation request to write a data word to a memory module, the memory module having a set of paired memory devices comprising a first memory device and a second memory device;
determining whether any failures exist in a word section storage of the first memory device and whether any failures exist in a word section storage of the second memory device;
writing a first section of the data word to th…

Assignees

• IBM

Inventors

• Cordero Edgar R
• Dell Timothy J
• Paulraj Girisankar
• Sethuraman Saravanan

Classifications

• G11C2029/0409

  Physics · mapped topic

• G11C29/52

  Physics · mapped topic

• G11C29/08 Primary

  Physics · mapped topic

• G06F11/2094

  Physics · mapped topic

• G11C29/42

  Physics · mapped topic