DMA integrity checker

Patent metadata

Field	Value
Publication number	US-8996926-B2
Application number	US-201213651775-A
Country	US
Kind code	B2
Filing date	Oct 15, 2012
Priority date	Oct 15, 2012
Publication date	Mar 31, 2015
Grant date	Mar 31, 2015

Abstract

Some embodiments relate to a Direct Memory Access (DMA) controller. The DMA controller includes a set of transaction control registers to receive a sequence of transaction control sets that collectively describe a data transfer to be processed by the DMA controller. A bus controller reads and writes to memory while the DMA controller executes a first transaction control set to accomplish part of the data transfer described in the sequence of transaction control sets. An integrity checker determines an actual error detection code based on data or an address actually processed by the DMA controller during execution of the first transaction control set. The integrity checker also selectively flags an error based on whether the actual error detection code is the same as an expected error detection code contained in a second transaction control set of the sequence of transaction control sets.

First claim

What is claimed is:

1. A Direct Memory Access (DMA) controller, comprising:
a set of transaction control registers configured to receive a sequence of descriptors that collectively describe a data transfer to be processed by the DMA controller;
a bus controller configured to read and write to memory while the DMA controller executes a first descriptor to accomplish part of the data transfer described in the sequence of descriptors; and
an integrity checker configured to determ…

Assignees

• Infineon Technologies Ag

Inventors

• Brewerton Simon
• Cottam Simon
• Hellwig Frank

Classifications

• G06F11/1048 Primary

  Physics · mapped topic