Global register protection in a multi-threaded processor

US8996847B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8996847-B2
Application numberUS-201313780115-A
CountryUS
Kind codeB2
Filing dateFeb 28, 2013
Priority dateAug 30, 2012
Publication dateMar 31, 2015
Grant dateMar 31, 2015

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Abstract

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Global register protection in a multi-threaded processor is described. In an embodiment, global resources within a multi-threaded processor are protected by performing checks, before allowing a thread to write to a global resource, to determine whether the thread has write access to the particular global resource. The check involves accessing one or more local control registers or a global control field within the multi-threaded processor and in an example, a local register associated with each other thread in the multi-threaded processor is accessed and checked to see whether it contains an identifier for the particular global resource. Only if none of the accessed local resources contain such an identifier, is the instruction issued and the thread allowed to write to the global resource. Otherwise, the instruction is blocked and an exception may be raised to alert the program that issued the instruction that the write failed.

First claim

Opening claim text (preview).

We claim: 1. A method for managing global resources within a multi-threaded processor, the multi-threaded processor comprising a plurality of threads and the method comprising: receiving an instruction from a thread to write to a global resource; checking, using hardware logic, one or more registers in the multi-threaded processor to determine whether the thread has write access to the global resource; and in response to determining that the thread has write access to the glob…

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What does patent US8996847B2 cover?
Global register protection in a multi-threaded processor is described. In an embodiment, global resources within a multi-threaded processor are protected by performing checks, before allowing a thread to write to a global resource, to determine whether the thread has write access to the particular global resource. The check involves accessing one or more local control registers or a global cont…
Who is the assignee on this patent?
Imagination Tech Ltd
What technology area does this patent fall under?
Primary CPC classification G06F9/30098. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).