System control using sparse data
US-12072810-B2 · Aug 27, 2024 · US
I/O controller and method for operating an I/O controller
US8996840B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8996840-B2 |
| Application number | US-201213705404-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 5, 2012 |
| Priority date | Dec 23, 2011 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Abstract
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An I/O controller, coupled to a processing unit and to a memory, includes an I/O link interface configured to receive data packets having virtual addresses; an address translation unit having an address translator to translate received virtual addresses into real addresses by translation control entries and a cache allocated to the address translator to cache a number of the translation control entries; an I/O packet processing unit for checking the data packets received at the I/O link interface and for forwarding the checked data packets to the address translation unit; and a prefetcher to forward address translation prefetch information from a data packet received to the address translation unit; the address translator configured to fetch the translation control entry for the data packet by the address translation prefetch information from the allocated cache or, if the translation control entry is not available in the allocated cache, from the memory.
First claim
Opening claim text (preview).
The invention claimed is: 1. An I/O controller for a processing unit, wherein the I/O controller is coupled to the processing unit and to a memory, the I/O controller comprising: an I/O link interface configured to receive data packets having virtual addresses; an address translation unit having an address translator configured to translate received virtual addresses into real addresses by translation control entries and a cache allocated to the address translator configured to…
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Physics · mapped topic
- G06F12/10Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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- What does patent US8996840B2 cover?
- An I/O controller, coupled to a processing unit and to a memory, includes an I/O link interface configured to receive data packets having virtual addresses; an address translation unit having an address translator to translate received virtual addresses into real addresses by translation control entries and a cache allocated to the address translator to cache a number of the translation control…
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification G06F12/10. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).