Flash memory controller and associated control method
US-2024377989-A1 · Nov 14, 2024 · US
Flash memory controller
US8996794B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8996794-B2 |
| Application number | US-201013515118-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 9, 2010 |
| Priority date | Dec 11, 2009 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Abstract
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A Flash memory controller is coupled to a first Flash memory package through a first Flash memory interface and to a second Flash memory package through the first Flash memory interface. The Flash memory controller is designed to receive a first instruction relating to the first Flash memory package and to perform a first process depending on the first instruction. The Flash memory controller is further designed to receive a second instruction relating to the second Flash memory package and to perform a second process depending on the second instruction. The Flash memory controller is further adapted for splitting the first process into at least two first sub-steps and for splitting the second process into at least two second sub-steps. The Flash memory controller is further adapted for executing the first and second sub-steps, and for interleaving execution of first and second sub-steps.
First claim
Opening claim text (preview).
The invention claimed is: 1. A Flash memory controller adapted to couple to a first Flash memory package and a second Flash memory package through a first Flash memory interface, the Flash memory controller to receive a first instruction relating to the first Flash memory package and adapted to perform a first process depending on the first instruction, the Flash memory controller to receive a second instruction relating to the second Flash memory package and adapted to perform a s…
Assignees
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Physics · mapped topic
Physics · mapped topic
- G06F13/1668Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US8996794B2 cover?
- A Flash memory controller is coupled to a first Flash memory package through a first Flash memory interface and to a second Flash memory package through the first Flash memory interface. The Flash memory controller is designed to receive a first instruction relating to the first Flash memory package and to perform a first process depending on the first instruction. The Flash memory controller i…
- Who is the assignee on this patent?
- Eleftheriou Evangelos S, Haas Robert, Hu Xiao-Yu, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification G06F13/1668. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).