Memory system and host device
US-2024394189-A1 · Nov 28, 2024 · US
Command controller, prefetch buffer and methods for accessing a serial flash in an embedded system
US8996784B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8996784-B2 |
| Application number | US-77821610-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 12, 2010 |
| Priority date | Mar 9, 2006 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Abstract
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The invention relates to a command controller and a prefetch buffer, and in particular, to a command controller and a prefetch buffer for accessing a serial flash in an embedded system. An embedded system comprises a serial flash, a processor, a plurality of access devices, and a prefetch buffer. The processor and the plurality of access devices send various commands to read data from or write data to the serial flash. The prefetch buffer temporarily stores a predetermined amount of data before data being read from or written to the serial flash.
First claim
Opening claim text (preview).
What is claimed is: 1. An embedded system comprising a processor, an access device and a serial flash, wherein the processor and the access device send commands to read data from or write data to the serial flash, and the embedded system further comprises: a serial flash request arbiter, coupled to the processor and the access device; a multiplexer, coupled to the serial flash, operative to selectively shift one instruction from a first instruction and a second instruction to th…
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- G06F12/0862Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US8996784B2 cover?
- The invention relates to a command controller and a prefetch buffer, and in particular, to a command controller and a prefetch buffer for accessing a serial flash in an embedded system. An embedded system comprises a serial flash, a processor, a plurality of access devices, and a prefetch buffer. The processor and the plurality of access devices send various commands to read data from or write …
- Who is the assignee on this patent?
- Tsai Chung-Hung, Lai Ming-Shiang, Mediatek Inc
- What technology area does this patent fall under?
- Primary CPC classification G06F12/0862. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).