Methods and systems of managing an interconnection
US-2015378852-A1 · Dec 31, 2015 · US
Integrated link calibration and multi-processor topology discovery
US8996770B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8996770-B2 |
| Application number | US-201213592406-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 23, 2012 |
| Priority date | Sep 6, 2011 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Abstract
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Integrating link calibration and dynamic topology discovery in a multi-processor system establishes a first of a plurality of processors in the multi-processor system as a director of integrated link calibration and dynamic topology discovery. A plurality of high speed interconnects connects the plurality of processors with each other. The director processor directs calibration of each of the plurality of high speed interconnects via a shared hardware resource. The shared hardware resource is shared among the plurality of processors. Topology of the multi-processor system is incrementally discovered as each of the plurality of high speed interconnects is calibrated based on a result of each of the plurality of high speed interconnects being calibrated.
First claim
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What is claimed is: 1. A method comprising: establishing a first of a plurality of processors in a multi-processor system as a director of integrated interconnect calibration and dynamic topology discovery, wherein a plurality of high speed interconnects connects the plurality of processors with each other; calibrating each of the plurality of high speed interconnects as directed by the director via a shared hardware resource, wherein the shared hardware resource is shared among…
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- G06F15/177Primary
Physics · mapped topic
- G06F13/00Primary
Physics · mapped topic
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- What does patent US8996770B2 cover?
- Integrating link calibration and dynamic topology discovery in a multi-processor system establishes a first of a plurality of processors in the multi-processor system as a director of integrated link calibration and dynamic topology discovery. A plurality of high speed interconnects connects the plurality of processors with each other. The director processor directs calibration of each of the p…
- Who is the assignee on this patent?
- Amann Eberhard, Haverkamp Frank, Kunigk Jan, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification G06F15/177. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).