Servicing a globally broadcast interrupt signal in a multi-threaded computer
US-9223729-B2 · Dec 29, 2015 · US
US8996760B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8996760-B2 |
| Application number | US-201113976222-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 3, 2011 |
| Priority date | Nov 3, 2011 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Official abstract text for this publication.
Methods to emulate a message signaled interrupt (MSI) with interrupt data are described herein. An embodiment of the invention includes a memory decoder to monitor a predetermined memory block allocated to a device, an interrupt controller to receive an emulated messaged signaled interrupt (MSI) signal from the memory decoder in response to a posted write transaction to the predetermined memory block initiated from the device, and an execution unit to execute an interrupt service routine (ISR) associated with the device to service the MSI using interrupt data retrieved from the predetermined memory block, without having to obtain the interrupt data from the device via an input output (IO) transaction.
Opening claim text (preview).
What is claimed is: 1. A processor, comprising: a memory decoder to monitor a predetermined memory block allocated to a device in a memory accessible by the device, the memory decoder to detect a posted write transaction to the predetermined memory block by the device and to generate an emulated message signaled interrupt (MSI) signal for an MSI in response to poses write transaction; an interrupt controller to receive the emulated MSI signal from the memory decoder and in respo…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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