Multi-purpose IO pads/bumps on semiconductor chips to maximize chip-to-chip data connectivity
US-12182051-B1 · Dec 31, 2024 · US
US8996751B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8996751-B2 |
| Application number | US-201313739581-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 11, 2013 |
| Priority date | Jan 11, 2013 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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An information handling system includes a processor, a memory communicatively coupled to the processor, and an information storage device coupled to the processor via an input/output (I/O) bus for communicating I/O data between the processor and the information storage device. The device further receives a specification of reporting criteria for information storage device parameters.
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What is claimed is: 1. An information handling system comprising: a processor; a memory communicatively coupled to the processor; and an information storage device communicatively coupled to the processor via an input/output (I/O) bus for communicating I/O data between the processor and the information storage device, the information storage device configured to receive a specification of reporting criteria for a plurality of information storage device parameters, to receive a…
Physics · mapped topic
Physics · mapped topic
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